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In electronics, a delay-locked loop is a pseudo-digital circuit similar to a phase-locked loop , with the main difference being the absence of an internal voltage-controlled oscillator, replaced by a delay line.

A DLL can be used to change the phase of a clock signal , usually to enhance the clock rise-to-data output valid timing characteristics of integrated circuits. DLLs can also be used for clock recovery. From the outside, a DLL can be seen as a negative-delay gate placed in the clock path of a digital circuit.

The main component of a DLL is a delay chain composed of many delay gates connected output-to-input. The input of the chain is connected to the clock that is to be negatively delayed. A multiplexer is connected to each stage of the delay chain; the selector of this multiplexer is automatically updated by a control circuit to produce the negative delay effect. The output of the DLL is the resulting, negatively delayed clock signal.

Another way to view the difference between a DLL and a PLL is that a DLL uses a variable phase block where a PLL uses a variable frequency block.

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